ASIC Digital Verification Engineer Lead
Job Overview
Looking for 8+ yrs of design verification Engineers with below skills
- RTL design (Verilog HDL)
- EDA verification experience (NC Verilog)
- Ability to use Microsoft Office software (Excel, Word, Outlook)
- Ability to use Linux CUI commands
- Experience with SV, UVM and SystemVerilog Assertions (SVA)
- Experience using version control tools (Subversion, git)
- Knowledge that would be beneficial
- AI Insights
- Ability to check timing reports during implementation
Required Skills
Roles & Responsibilities
- Under general supervision, performs engineering work and applied research, development, and design of new Integrated Chips.
- Work includes Architectural Design, Logic Design, Circuit Design, Physical Design, Verification, Fabrication, Packaging of Chips
- Bilingual English and Japanese (N2 and above)
Japanese Level
Business Level
English Level
Business Level
Employer Type
Direct Hire
Currency
JPY
Working Visa sponsorship Available?
No
